Home » Benefits » Increase IC robustness – PhyStar

Increase IC robustness – PhyStar

Sofics technology helps fabless designers to increase the robustness of their integrated circuits.

Below are examples how this was achieved.

Circuit design solutions for increased robustness and higher ratings

Last year, about 40% of new smartphones included Near Field Communication (NFC). According to analysts there are now 1 billion NFC enabled phones. Clearly, the use of NFC is ramping up because it can simplify aspects as diverse as communication, secure payments, user authentication, and retail loyalty programs for instance. Adding NFC functionality to an integrated circuit involves connecting the wireless interface pins to an antenna/coil. The voltage on those pads strongly depend on the distance between and alignment of transmit/read devices and the power of the transmitting device. The voltage can easily run above 10V, beyond the maximum tolerated voltage of the sensitive circuits. There are basically 2 ways to cope with this excess voltage.

There are several types of networks in cars to allow microcontrollers and devices to communicate with each other in applications without a host computer. LIN (Local Interconnect Network) is a serial network protocol used for communication between components in vehicles. It is typically used for non-safety critical applications, such as (light) sensors, seat positioning motors or even cruise control. As it is connected to the car battery, the supply range is broadly defined (7V-18V). The PHY should be designed to drive a variable load, depending on the number of slaves on the LIN bus. Additionally, the robustness requirements are quite severe; for example, the IC should survive loss of ground or loss of battery, pass high ESD levels and have a well thought out EMC design.

Some interfaces require a higher tolerance against EOS. Due to a lack of a better standards, companies tend to use IEC 61000-4-5 as reference to define the EOS tolerance. Sofics has been involved in the design of EOS tolerant IO’s up to 17V in a typical 130nm process.