For a number of interfaces the conventional ESD protection (2 diodes) is not possible. Specifically the diode from I/O to Vdd causes a lot of issues. Fortunately other ESD concepts are available.
Examples in different processes
Examples for different process nodes are shown below. This is just a subset of cells proven on silicon and in mass production. All cells can be ported to other processes. The actual numbers (ESD robustness, leakage, capacitance, area) may vary slightly, also depending on the circuit to be protected, process, voltage level.