SOFICS has a long tradition in creating Solutions for Integrated Circuits (ICs) at the forefront of semiconductor design and technology. Where we emphasize on the IC periphery, safeguarding and enhancing the core of ICs. For that purpose we have put together a challenge which simulates a real case scenario, that should be applicable for any student in electrical engineering or someone with an interest in electronics.
The problem
You get approached by a chip provider that they are experiencing high pulses on their I/O and they would like it to be protected from these over-voltages. They provide you with the necessary information on the different voltage levels and what voltages the I/O can handle. If the experienced voltage levels are above what the I/O can handle it could get damaged. It is important to note that the device should operate as normal at the expected voltage level and only if the voltage rises the device would need to be protected.
From the waveform below Fig. 1 you can observe these voltage levels of a typical voltage of 2.6V and the peak of 4V. This signal represents 2 different situation, an over-voltage situation (4V) and normal operation (2.6V). The supply voltage should be 5V.
To make sure that the I/O is not effected in normal operation your solution will need to meet a number of specification:
| Specifications | Symbol | Explanation | Value |
|---|---|---|---|
| Leakage current | Ileakage | During normal operation we want to minimize the effect of the protection on the functional circuit: This means that the load on the I/O during normal operation is as low a possible. We call this leakage current. | < 10mA |
| Holding voltage | Vh | If the voltage over your protection drops below the holding voltage your devices needs to turn off. A protection devices that does not turn off under a set voltage can lead to a latch-up issue (If the term latch-up is new to you a good place to start is here: Latch-up in CMOS circuits ) | We leave this one for you to decide. Important to know: in normal operation the I/O will not exceed 3V. |
| Absolute maximum voltage | Vmax | This is the maximum voltage that the I/O can handle, meaning that the devices will fail if this voltage is exceeded. | 3.7V |
These specifications will determent the design window of your protection circuit. If you want some extra information on what the actual design window will be, here is a good article explaining the concept: The ESD design window concept
If you want to read more about I/O protection: Introduction: ESD protection concepts for I/Os
Details on the circuit
To solve this challenge we will provide some practical information about the PCB:
The pulse pin (J3) as seen in Fig. 2 is connected to the LED (D6) with the label “Zapping!“ and will if nothing is connected between “Pulse Pins“ and GND (J4) blink periodical indicating that the I/O is being zapped. For the second LED (D3) this will light up as long as the board is powered. Therefore if the “Power ON” LED stops lighting up, the board is un-powered or the connected circuitry is not working as it should.
There are two 4X1 connectors for GND and “Pulse Pins” which can be used however you wish, but can also be connected to a breadboard for easier prototyping and testing.
To power the board a USB type C is already provided on the board with components, but if you prefer a USB type B can be connected to J1 (See the table bellow of specific component and footprint). If you prefer to connect a supply directly to board this can be done with connector J5.
What do you need?
To get stated you need to get the following components in the table bellow and solder them to the provided PCB or you can contact us at challenges@sofics.com to receive a PCB with all components attached. These components should be easy to get, and if you have access to a maker space or a lab at your university then you might have access to them already.
| Designator | Footprint | Quantity | Designation |
|---|---|---|---|
| C3 | 1206 | 1 | 1µF |
| U2 | SOT-23 | 1 | MCP1700x-330xxTT |
| J2 | USB Type C Receptacle USB4105 series | 1 | USB_C |
| U1 | SOIC-8 | 1 | ICM7555xB |
| R4, R8 | 1206 | 2 | 10K |
| J3, J4 | PinHeader_1x04_P2.54mm | 2 | Conn_01x04_Pin |
| C1, C4, C5, C6 | 1206 | 4 | 100nF |
| D4, D5 | SOD-123 | 2 | 1N4148W |
| R3 | 1206 | 1 | 1M |
| D3, D6 | 1206 | 2 | HSMD-C150 |
| R1, R2 | 1206 | 2 | 5K1 |
| C2, C8 | 1206 | 2 | 10µF |
| J5 | PinHeader_1x02_P2.54mm | 1 | Conn_01x02_Pin |
| J1 | USB_Micro-B: ZX62D-B-5PA8 | 1 | USB_B_Micro |
| R5 | 1206 | 1 | 47 |
| R6 | 1206 | 1 | 120 |
| Q1 | SOT-23-3 | 1 | NTR4101PT1H |
| R7 | 1206 | 1 | 150 |