Tag: 2nm
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Sofics Datasheet – TSMC 2nm 1V2 GPIO
This TSMC 2nm 1.2V GPIO IP provides configurable, overvoltage-tolerant I/O functionality for advanced-node designs. The IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow. DS-TS2N-1V2-GPIO Key Highlights Details Parameter Value VDD 0.75V ±10% VDDIO 1.2V ±10% Temperature…
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Sofics Datasheet – TSMC 2nm 1V8 GPIO
This TSMC 2nm 1.8V GPIO IP provides configurable, overvoltage-tolerant I/O functionality for advanced-node designs. The IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow. DS-TS2N-1V8-GPIO Key Highlights Details Parameter Value VDD 0.75V ±10% VDDIO 1.8V ±5% Temperature…
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Sofics Datasheet – TSMC 2nm 1V8 ESD Local Clamp – Low Leakage
This specific IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS2-1V8-LC-LL-ESD] Key Highlights Details Parameter Value VDD 1.8V ±10% IO signal voltage 1.8V ±10% Temperature Tj -40C to 125C Key Features Parameter Value…
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Sofics Datasheet – TSMC 2nm 1V8 ESD Power Clamp – Low Leakage
This specific IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS2-1V8-PC-LL-ESD] Key Highlights Details Parameter Value VDD 1.8V ±10% Temperature Tj -40C to 125C Key Features Parameter Value Leakage <14nA TLP 4.82A HBM…