Tag: TheMonthlyPulse
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Protecting die-2-die interfaces
At Sofics we get a lot of questions about the required ESD robustness for the die-2-die (D2D) interfaces between chiplets in a package. People wonder how to select the right ESD standard and what robustness level they need to design for. Sofics has supported several chiplet projects for AI, data…
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Protecting die-2-die interfaces…
At Sofics we get a lot of questions about the required ESD robustness for the die-2-die (D2D) interfaces between chiplets in a package. People wonder how to select the right ESD standard and what robustness level they need to design for. Sofics has supported several chiplet projects for AI, data…
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ESD basic: Silicon Control Rectifier (SCR)
SCR intro: Silicon-controlled rectifiers (SCRs) are interesting devices that can be used for on-chip ESD protection, if (and only if) they are properly designed and biased. SCRs are used for high-speed/RF or low-capacitance, small area/high-performance ESD solutions in all CMOS technologies, including SOI and FinFET (down to 3nm today). SCR…
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ggNMOS (grounded-gated NMOS)
ggNMOS intro: For decades, a traditional workhorse device for ESD protection for standard applications in CMOS technology has been the grounded-gate NMOS device (ggNMOS). Nevertheless, we have been explaining the operation of this device countless times, including as recently as 3 weeks ago. So, it is time for a short…
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Let’s talk about 2023
Sofics’ CEO outlook for 2023… 2023 will be a year of opportunity to invest in our readiness to grow and flourish in 2024. Whatever your semiconductor business, your key assets: team, skills, technology, processes, and reputation, should not go to waste.
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Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology
Sofics’ 2021 IEDS publication. Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS,…
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New opportunities for automotive LIN interfaces
Due to the semiconductor shortage in 2021 everyone realized that cars these days integrate a lot of electronics. The average number of computer chips per car has increased a lot in the last decade. It is clear that the new applications require high-speed interconnects that are not possible with the…
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Selecting optimized ESD protection for CMOS image sensors
Today, you can find CMOS image sensors almost everywhere in consumer, automotive, health and security applications. There has been a lot of innovation to enable demanding requirements. The article provides a summary about the 3 main aspects that IC designers need to consider when selecting the ESD protection clamps for…
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3 approaches to handle EOS ‘requirements’
EOS, or Electrical Overstress, is any electrical stress that exceeds any of the specified absolute maximum ratings (AMR) of a product. It is important to discuss because many products are damaged this way. This article includes case studies and 3 approaches to handle those requests.
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Optimized on-chip ESD protection to enable high-speed Ethernet in cars.
In the past most Electronic Control Units (ECU) used CAN and LIN interfaces to connect to sensors, actuators and each other. However, the newest applications need (much) faster communication options. Gigabit automotive ethernet is pushed by many in the industry as the perfect solution. With its local ESD clamp approach,…