Tag: 1V8
-
Sofics Datasheet – Samsung Foundry 4nm 1V8 GPIO I3C
This specific IP macro is designed in Samsung Foundry 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-SF4N-1V8-GPIO-I3C] Key Highlights Details Parameter Value VDD 0.75V ±10% VDDIO 1.2V ±10% / 1.8V ±10% Temperature Tj -40C to 125C Key Features…
-
Sofics Datasheet – TSMC 4nm 1V8 GPIO I2C & I3C
This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS4N-1V8-I23C-GPIO] Key Highlights Broad portfolio of IO configurations from a single base architecture Modular design enables fast and reliable turnaround and low NRE…
-
Sofics Datasheet – TSMC 12nm 3V3 GPIO
This specific IP macro is designed in TSMC 12nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS12N-3V3-GPIO] Key Highlights Broad portfolio of IO configurations from a single base architecture Modular design enables fast and reliable turnaround and low NRE…
-
Sofics Datasheet – TSMC 65nm 3V3 GPIO – 2.5V / 3.3V Device Options
This specific IP macro is designed in TSMC 65nm LP and is available using either 3.3V or 2.5V I/O transistors. The 2.5V transistor option supports 3.3V VDDIO operation. Core supply VDD is 1.2V, with supported I/O modes from 1.8V to 3.3V. It can be ported to other technologies upon request…
-
Sofics Datasheet – TSMC 22nm 1.0V, 1.2V & 1.8V GPIO
This specific IP macro is designed in TSMC 22nm and can be ported to other technologies upon request using Sofics in-house design tool flow. DS-TS22N-1V0-1V2-1V8-GPIO Key Highlights Details Parameter Value VDD 1.8V – 3V3 ±10% VDDIO 1.0 ±10%1.2 ±10%1.8 ±10% Temperature Tj -40°C to 125°C Key Features Parameter Value Maximum…
-
Sofics Datasheet – TSMC 5nm 1V8, 1.2V and 0.9V ESD Local Protection – Low Cap
This TSMC 5nm 1.8V, 1.2V and 0.9V ESD Local Protection IP provides low-capacitance, low-leakage protection for sensitive I/O and interface pins. It is designed in TSMC 5nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS5N-1V8-1V2-0v9-LC-LWC01-ESD] Key Highlights Details Parameter…
-
Sofics Datasheet – TSMC 3nm 1V8 GPIO
This TSMC 3nm 1.8V GPIO IP provides configurable, overvoltage-tolerant I/O functionality for advanced-node designs. The IP macro is designed in TSMC 3nm and can be ported to other technologies upon request using Sofics in-house design tool flow. DS-TS4N-1V8GPIO Key Highlights Details Parameter Value VDD 0.75V ±10% VDDIO 1.8V ±10% Temperature…
-
Sofics Datasheet – TSMC 2nm 1V8 GPIO
This TSMC 2nm 1.8V GPIO IP provides configurable, overvoltage-tolerant I/O functionality for advanced-node designs. The IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow. DS-TS2N-1V8-GPIO Key Highlights Details Parameter Value VDD 0.75V ±10% VDDIO 1.8V ±5% Temperature…
-
Sofics Datasheet – TSMC 2nm 1V8 ESD Local Clamp – Low Leakage
This specific IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS2-1V8-LC-LL-ESD] Key Highlights Details Parameter Value VDD 1.8V ±10% IO signal voltage 1.8V ±10% Temperature Tj -40C to 125C Key Features Parameter Value…
-
Sofics Datasheet – TSMC 2nm 1V8 ESD Power Clamp – Low Leakage
This specific IP macro is designed in TSMC 2nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS2-1V8-PC-LL-ESD] Key Highlights Details Parameter Value VDD 1.8V ±10% Temperature Tj -40C to 125C Key Features Parameter Value Leakage <14nA TLP 4.82A HBM…