Tag: 7nm
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Sofics Datasheet – TSMC 7nm 2V5 ESD Local Clamp
This specific IP macro is designed in TSMC 7nm and can be ported to other technologies upon request using Sofics in-house design tool flow. The 2.5V local clamp provides 1.33A TLP, 2kV HBM and 5A CDM performance with 10nA leakage at 25C. Its compact 1600µm² implementation supports local protection for…
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Sofics Datasheet – TSMC 7nm 3V3 ESD Local Clamp
This specific IP macro is designed in TSMC 7nm and can be ported to other technologies upon request using Sofics in-house design tool flow. The 3.3V local clamp provides 2.35A TLP, 3.5kV HBM and 5A CDM performance with leakage below 50nA at 25C. Its compact 1800µm² implementation supports local protection…
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Sofics Datasheet – TSMC 7nm 0V75 / 0V9 ESD Local Clamp – Low Cap
This specific IP macro is designed in TSMC 7nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Multiple clamp variants enable trade-offs between ESD robustness, parasitic capacitance, leakage and silicon area, including options down to 10fF capacitance and 133.84µm² area. Sofics Datasheet –…