This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
Sofics Datasheet – [DS-TS4N-1V2-I23C-GPIO]
Key Highlights
- Broad portfolio of IO configurations from a single base architecture
- Modular design enables fast and reliable turnaround and low NRE
- Proven across multiple advanced nodes
- Optimized for performance, power, and area trade-offs
Details
| Parameter | Value |
|---|---|
| VDD | 0.75V ±10% |
| VDDIO | 1.2V ±10% |
| Temperature Tj | -40C to 125C |
Key Features
| Parameter | Value |
|---|---|
| Maximum bit rate | ≤12.9MHz – I2C/I3C compatible |
| Leakage | <10µA |
| Drive strength | 2mA (other options available) |
| ESD robustness | 2kV HBM | 500V CDM – standard (other options available) |
Area
| Type | Size [μm²] |
|---|---|
| I/O | 2232 |
Summary
Sofics specialty I/Os offer configurable GPIOs with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes. Designed for advanced nodes, they enable reliable interfacing between low-voltage cores and higher-voltage or legacy systems.
Pin Schematic
Features
- Overvoltage tolerant design
- Supports multiple supply voltages
- Input enable/disable
- I2C, I3C and fail-safe
- Tri-state output
- Pull select | Pull-up/Pull-down
- Compatible with TSMC I/O ring
- Other analog features such as SPI, UART, JTAG, PWM, WDT, slew rate control, drive strength options and more
Sofics offers a broad portfolio of configurable specialty I/Os enabling flexible integration across multiple voltage domains and applications. Additional variants and features can be supported upon request, allowing fast customization through minimal design changes. For more information, visit www.sofics.com or contact us at bd@sofics.com.
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