Tag: OVT
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Sofics Datasheet – Samsung Foundry 4nm 1V8 GPIO I3C
This specific IP macro is designed in Samsung Foundry 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-SF4N-1V8-GPIO-I3C] Key Highlights Details Parameter Value VDD 0.75V ±10% VDDIO 1.2V ±10% / 1.8V ±10% Temperature Tj -40C to 125C Key Features…
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Sofics Datasheet – TSMC 4nm 1V8 GPIO I2C & I3C
This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS4N-1V8-I23C-GPIO] Key Highlights Broad portfolio of IO configurations from a single base architecture Modular design enables fast and reliable turnaround and low NRE…
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Sofics Datasheet – TSMC 4nm 1V2 GPIO I2C & I3C
This specific IP macro is designed in TSMC 4nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS4N-1V2-I23C-GPIO] Key Highlights Details Parameter Value VDD 0.75V ±10% VDDIO 1.2V ±10% Temperature Tj -40C to 125C Key Features Parameter Value Maximum bit…
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Sofics Datasheet – TSMC 6nm 3V3 GPIO
This specific IP macro is designed in TSMC 6nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS6N-3V3-GPIO] Key Highlights Broad portfolio of IO configurations from a single base architecture Modular design enables fast and reliable turnaround and low NRE…
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Sofics Datasheet – TSMC 12nm 3V3 GPIO
This specific IP macro is designed in TSMC 12nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS12N-3V3-GPIO] Key Highlights Broad portfolio of IO configurations from a single base architecture Modular design enables fast and reliable turnaround and low NRE…
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Sofics Datasheet – TSMC 65nm 3V3 GPIO – 2.5V / 3.3V Device Options
This specific IP macro is designed in TSMC 65nm LP and is available using either 3.3V or 2.5V I/O transistors. The 2.5V transistor option supports 3.3V VDDIO operation. Core supply VDD is 1.2V, with supported I/O modes from 1.8V to 3.3V. It can be ported to other technologies upon request…
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Sofics Datasheet – TSMC 40nm 5V GPIO
This specific IP macro is designed in 40nm and can be ported to other technologies upon request using Sofics in-house design tool flow. Sofics Datasheet – [DS-TS40N-5V-GPIO] Key Highlights Details Parameter Value VDD 1.1V ±10% VDDIO 5V ±10% Temperature Tj -40C to 105C Key Features Parameter Value Maximum bit rate…
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Sofics Datasheet – TSMC 22nm 1.0V, 1.2V & 1.8V GPIO
This specific IP macro is designed in TSMC 22nm and can be ported to other technologies upon request using Sofics in-house design tool flow. DS-TS22N-1V0-1V2-1V8-GPIO Key Highlights Details Parameter Value VDD 1.8V – 3V3 ±10% VDDIO 1.0 ±10%1.2 ±10%1.8 ±10% Temperature Tj -40°C to 125°C Key Features Parameter Value Maximum…
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Sofics Datasheet – GlobalFoundries 22nm 3V3 GPIO
This specific IP macro is designed in GlobalFoundries 22nm and can be ported to other technologies upon request using Sofics in-house design tool flow. It combines a 0.8V core supply with a 3.3V I/O supply and supports over-voltage tolerance, multiple supply voltages, input enable/disable, tri-state output, selectable pull-up/pull-down and an…
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Sofics Datasheet – TSMC 22nm 5V0 GPIO
This specific IP macro is designed in TSMC 22nm and can be ported to other technologies upon request using Sofics in-house design tool flow. DS-TS22N-5V0-GPIO Key Highlights Details Parameter Value VDD 0.8V ± 10% VDDIO 5V ± 10% Temperature Tj -40°C to 105°C Key Features Parameter Value Maximum bit rate…