This specific IP macro is designed in TSMC 6nm and can be ported to other technologies upon request using Sofics in-house design tool flow.
Sofics Datasheet – [DS-TS6N-3V3-GPIO]
Key Highlights
- Broad portfolio of IO configurations from a single base architecture
- Modular design enables fast and reliable turnaround and low NRE
- Proven across multiple advanced nodes
- Optimized for performance, power, and area trade-offs
Details
| Parameter | Value |
|---|---|
| VDD | 1.8V ±10% |
| VDDIO | 3.3V ±10% |
| Temperature Tj | -40C to 125C |
Key Features
| Parameter | Value |
|---|---|
| Maximum bit rate | 10Mbit/s @ 10pF |
| Power consumption | 30uW |
| Drive strength | 2.1-6mA (other options available) |
| ESD robustness | 2kV HBM | 500V CDM |
Area
| Type | Size [μm²] |
|---|---|
| I/O | 2950 – 4423 |
Summary
Sofics specialty I/Os offer configurable GPIOs with multi-voltage support, over-voltage tolerance (OVT), and high-speed or ultra-low-power modes. Designed for advanced nodes, they enable reliable interfacing between low-voltage cores and higher-voltage or legacy systems.
An integrated voltage regulator ensures stable operation across wide voltage ranges, for auxiliary supply domains, supporting multi-voltage and OVT functionality without external components.
Pin Schematic
Features
- Overvoltage tolerant design
- Fail-safe
- Supports multiple supply voltages
- Input enable/disable
- Tri-state output
- Pull select | Pull-up/Pull-down
- Compatible with TSMC I/O ring
- Integrated voltage regulator
- Other analog features such as I2C, I3C, SPI, UART, JTAG, PWM, WDT, slew rate control, drive strength options and more
Sofics offers a broad portfolio of configurable specialty I/Os enabling flexible integration across multiple voltage domains and applications. Additional variants and features can be supported upon request, allowing fast customization through minimal design changes. For more information, visit www.sofics.com or contact us at bd@sofics.com.
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