Communications

Frequently chip designers need to include high bandwidth interfaces (wired, wireless or optical). For these applications the conventional ESD approach is not effective anymore and custom ESD protection is required.

Custom Requirements

IC designers that integrate high bandwidth interfaces on their chips require custom ESD solutions:

High-bandwidth communication require I/Os and ESD protection with low parasitic capacitance

These interfaces are typically designed on the most advanced CMOS and FinFET processes for the highest performance. The core transistors on these processes are very sensitive to ESD stress. Effective ESD protection clamps are required

High speed interfaces run at a voltage below the typical I/O voltage. Custom I/O and ESD circuits are required.

For LNA inputs the leakage of the ESD protection needs to be as low as possible to improve the Q-factor. Low leakage ESD protectionconcepts come in handy.

Sofics IP for High-bandwidth interfaces

Key Focus Areas

High-Speed interfaces

Die-2-die interface protection

Sofics IP is used for many high-speed data interfaces (wired and optical) between the compute and memory functions. These interfaces need ESD clamps with low parasitic capacitance. Sofics clamps provide standard ESD robustness and do not require a resistance in the signal path.

Recently, die-2-die interfaces between chiplets require high-bandwidth interfaces. The dies are combined in 2.5D or 3D stacking. These connections can benefit a lot (smaller area, lower parasitic capacitance, lower leakage) from custom ESD solutions with lower robustness.

ESD with low capacitance

Die-2-die interfaces

LNA Q-factor

Low voltage signaling

Wireless LNA (inputs) can benefit from low leakage ESD protection. The leakage of Sofics’ ESD cells is 100x lower compared to conventional approach. Huge improvements can be made in the Q-factor for the LNA pads.

High frequency interfaces are built with thin oxide transistors. They also frequently run at a low signal voltage, below the standard I/O voltage range. Sofics has delivered ESD protection solutions for the most sensitive transistors on CMOS and FinFET processes and operating at a voltage of 1V or lower.

Low leakage ESD

Enhanced ESD robustness

Some interfaces require higher ESD robustness, well beyond the typical 2kV HBM. Typical examples include USB, DisplayPort and HDMI interfaces Our ESD clamps can be easily scaled to any ESD/EOS protection level. We have delivered ESD clamps for 4kV, 8kV HBM as well as for 8kV IEC 61000-4-2.

Clamps with high ESD robustness

Process technology covered

Foundries covered

Advanced CMOS (40nm to 22nm)
BiCMOS technology
FinFET technology
Mainstream CMOS (130nm to 65nm)
Mature CMOS (0.5um to 180nm)
SOI technology

TSMC
Samsung Foundry
UMC
GlobalFoundries
SMIC

IC products from our costumers

Sofics IP for high frequency interfaces is used in many IC projects from customers in USA, EU, UK, Japan, Taiwan, …
Examples for wired interfaces include HDMI, DisplayPort, SerDes, LVDS, V-by-one, MIPI, USB, PCIexpress, ….
We have supported 15+ projects on high-speed silicon photonics communication. Our IP is used in wireless interfaces for Bluetooth, Wifi, GPS, 4G, 5G, …