Category: FinFET

• 2.5D and 3D hybrid integration ESD protection FinFET SerDES

  Protecting die-2-die interfaces

  At Sofics we get a lot of questions about the required ESD robustness for the die-2-die (D2D) interfaces between chiplets in a package. People wonder how to select the right ESD standard and what robustness level they need to design for. Sofics has supported several chiplet projects for AI, data…

  April 14, 2023
• 2.5D and 3D hybrid integration ESD protection FinFET SerDES

  Protecting die-2-die interfaces…

  

  At Sofics we get a lot of questions about the required ESD robustness for the die-2-die (D2D) interfaces between chiplets in a package. People wonder how to select the right ESD standard and what robustness level they need to design for. Sofics has supported several chiplet projects for AI, data…

  April 14, 2023
• DTSCR dual diode ESD protection ESD protection approaches FinFET Local clamp SCR Silicon controlled rectifier SOI

  ESD basic: Silicon Control Rectifier (SCR)

  

  SCR intro: Silicon-controlled rectifiers (SCRs) are interesting devices that can be used for on-chip ESD protection, if (and only if) they are properly designed and biased. SCRs are used for high-speed/RF or low-capacitance, small area/high-performance ESD solutions in all CMOS technologies, including SOI and FinFET (down to 3nm today). SCR…

  February 10, 2023
• CMOS DTSCR ESD devices ESD protection FinFET Local clamp Low capacitance ESD Optical communication Paper SCR SerDES SiGe BiCMOS Silicon controlled rectifier SOI TakeCharge Wired communication

  Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

  Sofics’ 2021 IEDS publication. Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS,…

  August 9, 2022
• Automotive CMOS dual diode ESD protection ESD protection approaches Ethernet FinFET High ESD or IEC 61000-4-2 robustness High speed interfaces Local clamp Low capacitance ESD SerDES TakeCharge Wired communication

  Optimized on-chip ESD protection to enable high-speed Ethernet in cars.

  In the past most Electronic Control Units (ECU) used CAN and LIN interfaces to connect to sensors, actuators and each other. However, the newest applications need (much) faster communication options. Gigabit automotive ethernet is pushed by many in the industry as the perfect solution. With its local ESD clamp approach,…

  May 18, 2022
• ESD devices ESD protection ESD protection approaches FinFET Local clamp SCR SerDES Silicon controlled rectifier

  Optimized ESD protection based on Silicon Controlled Rectifiers (SCR), verified on Samsung Foundry 4nm and 8nm FinFET processes

  Engineers developing semiconductor devices in the most advanced FinFET technology need improved ESD protection solutions. We demonstrate ESD protection solutions based on proprietary Silicon Controlled Rectifiers verified on the Samsung Foundry 8nm and 4nm FinFET process.

  February 15, 2022
• 2.5D and 3D hybrid integration ESD protection ESD protection approaches FinFET SerDES Silicon controlled rectifier

  Optimized Local I/O ESD Protection in FinFET Technology for 2.5D and 3D hybrid integration

  Semiconductor companies using 2.5D and 3D hybrid integration need to consider Electrostatic Discharge (ESD) protection early in the design, even for die-2-die interfaces that remain inside the package. There are several challenges but also opportunities. The use of a local ESD protection clamp at the TSV offers more robustness, higher…

  January 10, 2022
• ESD devices ESD protection ESD protection approaches FinFET Local clamp Low capacitance ESD SerDES Silicon controlled rectifier SOI

  Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

  Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS, SOI and FinFET nodes.

  September 16, 2021