Category: ESD devices

• CMOS DTSCR ESD devices ESD protection FinFET Local clamp Low capacitance ESD Optical communication Paper SCR SerDES SiGe BiCMOS Silicon controlled rectifier SOI TakeCharge Wired communication

  Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

  Sofics’ 2021 IEDS publication. Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS,…

  August 9, 2022
• ESD devices ESD protection ESD protection approaches GPIO IO SOFICS TSMC

  Selecting custom ESD IP for your next IC

  Fabless semiconductor companies usually use third-party IP blocks when developing ICs. An important IP is on-chip ESD protection. Caution must be exercised in choosing the right ESD IP to avoid patent infringement and inefficient ESD clamps. Thomas Ako made a presentation about the IP selection process on the 2021 IP-SOC event…

  April 6, 2022
• dual diode ESD design window ESD devices ESD protection ESD protection approaches Local clamp Secondary protection Self-protected drivers

  Introduction: ESD protection concepts for I/Os

  There are many different approaches to ensure effective ESD protection for integrated circuits. It is important to select the right approach for each interface and power domain. This article outlines the main options for Interface protection.

  March 29, 2022
• ESD devices ESD protection ESD protection approaches FinFET Local clamp SCR SerDES Silicon controlled rectifier

  Optimized ESD protection based on Silicon Controlled Rectifiers (SCR), verified on Samsung Foundry 4nm and 8nm FinFET processes

  Engineers developing semiconductor devices in the most advanced FinFET technology need improved ESD protection solutions. We demonstrate ESD protection solutions based on proprietary Silicon Controlled Rectifiers verified on the Samsung Foundry 8nm and 4nm FinFET process.

  February 15, 2022
• BCD technology ESD design window ESD devices ESD protection ESD protection approaches ESD testing

  Time to say farewell to the snapback ggNMOS for ESD protection

  For many years, IC designers coult count on the snapback behaviour of the ggNMOS device for ESD protection in mature CMOS nodes (180nm and below). However, for more advanced CMOS, FinFET, SOI and high voltage processes there are serious drawbacks.

  February 2, 2022
• ESD design window ESD devices ESD protection ESD protection approaches SOFICS

  Introduction about ESD protection: basic concepts to advanced applications

  Koen Decock, ESD design specialist at Sofics, made a presentation for a full auditorium, organized by the local IEEE SSCS student chapter in Leuven. He talked about on-chip ESD protection, from the basic concepts to the more advanced applications.

  November 26, 2021
• BCD technology ESD devices ESD protection ESD protection approaches High Voltage PowerQubic Zener

  ESD clamps for high voltage, BCD processes

  Some applications really need high voltage interfaces and circuits. Think about power management and power conversion chips, automotive electronics for engine control, LCD or OLED display driver chips, motor driver electronics and industrial applications. These high voltage applications require other ESD protection clamps compared to the clamps used for protection…

  November 23, 2021
• ESD devices ESD protection Low leakage Silicon controlled rectifier SOI Wireless

  Optimized IP for GF’s 22nm FDX technology

  The 22nm FDX process from GlobalFoundries is a great technology for various applications including low-power IoT on the edge, high-bandwidth 5G mmWave devices and automotive products, Since its market introduction, the SOI process technology receives a lot of attention because it combines unique features in one platform. At the 2021…

  September 23, 2021
• ESD devices ESD protection ESD protection approaches FinFET Local clamp Low capacitance ESD SerDES Silicon controlled rectifier SOI

  Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

  Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS, SOI and FinFET nodes.

  September 16, 2021