Author: Bart Keppens

• 2.5D and 3D hybrid integration ESD protection FinFET SerDES

  Protecting die-2-die interfaces…

  

  At Sofics we get a lot of questions about the required ESD robustness for the die-2-die (D2D) interfaces between chiplets in a package. People wonder how to select the right ESD standard and what robustness level they need to design for. Sofics has supported several chiplet projects for AI, data…

  April 14, 2023
• 2.5D and 3D hybrid integration ESD protection FinFET SerDES

  Protecting die-2-die interfaces

  At Sofics we get a lot of questions about the required ESD robustness for the die-2-die (D2D) interfaces between chiplets in a package. People wonder how to select the right ESD standard and what robustness level they need to design for. Sofics has supported several chiplet projects for AI, data…

  April 14, 2023
• CMOS DTSCR ESD devices ESD protection FinFET Local clamp Low capacitance ESD Optical communication Paper SCR SerDES SiGe BiCMOS Silicon controlled rectifier SOI TakeCharge Wired communication

  Optimized Local I/O ESD Protection for SerDes In Advanced SOI, BiCMOS and FinFET Technology

  Sofics’ 2021 IEDS publication. Semiconductor companies are developing ever faster interfaces to satisfy the need for higher data throughputs. However, the parasitic capacitance of the traditional ESD solutions limits the signal frequency. This paper demonstrates low-cap Analog I/Os for high speed SerDes (28Gbps to 112Gbps) circuits created in advanced BiCMOS,…

  August 9, 2022
• Automotive BCD BCD technology ESD protection High ESD or IEC 61000-4-2 robustness High voltage tolerance IEC 61000-4-2 Latch-up immunity LIN transceiver PhyStar PowerQubic System Basic Chips

  New opportunities for automotive LIN interfaces

  Due to the semiconductor shortage in 2021 everyone realized that cars these days integrate a lot of electronics. The average number of computer chips per car has increased a lot in the last decade. It is clear that the new applications require high-speed interconnects that are not possible with the…

  July 1, 2022
• 2.5D and 3D hybrid integration 3D integration CMOS ESD design window ESD protection High voltage tolerance Imagers Local clamp Low capacitance ESD Silicon controlled rectifier Wired communication

  Selecting optimized ESD protection for CMOS image sensors

  Today, you can find CMOS image sensors almost everywhere in consumer, automotive, health and security applications. There has been a lot of innovation to enable demanding requirements. The article provides a summary about the 3 main aspects that IC designers need to consider when selecting the ESD protection clamps for…

  June 1, 2022
• Automotive CMOS Display EOS ESD design window ESD protection ESD protection approaches ESD testing High Voltage High voltage tolerance IEC 61000-4-5 Local clamp Over voltage tolerant overvoltage tolerant PowerQubic TakeCharge

  3 approaches to handle EOS ‘requirements’

  EOS, or Electrical Overstress, is any electrical stress that exceeds any of the specified absolute maximum ratings (AMR) of a product. It is important to discuss because many products are damaged this way. This article includes case studies and 3 approaches to handle those requests.

  May 27, 2022
• Automotive CMOS dual diode ESD protection ESD protection approaches Ethernet FinFET High ESD or IEC 61000-4-2 robustness High speed interfaces Local clamp Low capacitance ESD SerDES TakeCharge Wired communication

  Optimized on-chip ESD protection to enable high-speed Ethernet in cars.

  In the past most Electronic Control Units (ECU) used CAN and LIN interfaces to connect to sensors, actuators and each other. However, the newest applications need (much) faster communication options. Gigabit automotive ethernet is pushed by many in the industry as the perfect solution. With its local ESD clamp approach,…

  May 18, 2022
• dual diode ESD design window ESD devices ESD protection ESD protection approaches Local clamp Secondary protection Self-protected drivers

  Introduction: ESD protection concepts for I/Os

  There are many different approaches to ensure effective ESD protection for integrated circuits. It is important to select the right approach for each interface and power domain. This article outlines the main options for Interface protection.

  March 29, 2022
• ESD devices ESD protection ESD protection approaches FinFET Local clamp SCR SerDES Silicon controlled rectifier

  Optimized ESD protection based on Silicon Controlled Rectifiers (SCR), verified on Samsung Foundry 4nm and 8nm FinFET processes

  Engineers developing semiconductor devices in the most advanced FinFET technology need improved ESD protection solutions. We demonstrate ESD protection solutions based on proprietary Silicon Controlled Rectifiers verified on the Samsung Foundry 8nm and 4nm FinFET process.

  February 15, 2022
• BCD technology ESD design window ESD devices ESD protection ESD protection approaches ESD testing

  Time to say farewell to the snapback ggNMOS for ESD protection

  For many years, IC designers coult count on the snapback behaviour of the ggNMOS device for ESD protection in mature CMOS nodes (180nm and below). However, for more advanced CMOS, FinFET, SOI and high voltage processes there are serious drawbacks.

  February 2, 2022